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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
15 years 2 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
WWW
2008
ACM
15 years 10 months ago
Dtwiki: a disconnection and intermittency tolerant wiki
Wikis have proven to be a valuable tool for collaboration and content generation on the web. Simple semantics and ease-of-use make wiki systems well suited for meeting many emergi...
Bowei Du, Eric A. Brewer
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
15 years 10 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
SIMUTOOLS
2008
14 years 11 months ago
Implementing MAC protocols for cooperative relaying: a compiler-assisted approach
Evaluating the performance of a cooperative relaying protocol requires an implementation for simulators and/or software-defined radios (SDRs) with an appropriate model for error d...
Hermann S. Lichte, Stefan Valentin
ICECCS
2009
IEEE
161views Hardware» more  ICECCS 2009»
15 years 4 months ago
Formal Modelling and Analysis of Business Information Applications with Fault Tolerant Middleware
Distributed information systems are critical to the functioning of many businesses; designing them to be dependable is a challenging but important task. We report our experience i...
Jeremy Bryans, John S. Fitzgerald, Alexander Roman...