93 search results - page 11 / 19 » A Genetic Testing Framework for Digital Integrated Circuits |
84
Voted
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
67
Voted
CCECE
2009
IEEE
15 years 2 months ago
2009
IEEE
A truly monolithic clock and data recovery (CDR) circuit for low cost low-end data communication systems has been realized in 0.6ȝm CMOS. The implemented CDR comprises a phase-an...
FPGA
2010
ACM
14 years 7 months ago
2010
ACM
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
ICES
2005
Springer
15 years 3 months ago
2005
Springer
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
WSC
2007
14 years 12 months ago
2007
This paper describes an innovative framework, iFAOSimo, which integrates optimization, simulation and GIS (geographic information system) techniques to handle complex spatial faci...