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DAC
2003
ACM
15 years 10 months ago
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
ERSA
2010
187views Hardware» more  ERSA 2010»
14 years 7 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl
ICDAR
2003
IEEE
15 years 2 months ago
An Evolutionary Algorithm for General Symbol Segmentation
A new system is presented for general symbol segmentation, which is applicable for segmentation of any connected string of symbols, including characters and line diagrams. Using a...
Stephen Pearce, Maher Ahmed
GLVLSI
2003
IEEE
175views VLSI» more  GLVLSI 2003»
15 years 2 months ago
A custom FPGA for the simulation of gene regulatory networks
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...
GLVLSI
2006
IEEE
193views VLSI» more  GLVLSI 2006»
15 years 3 months ago
Optimizing noise-immune nanoscale circuits using principles of Markov random fields
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...