Sciweavers

1998 search results - page 3 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
EXPCS
2007
13 years 10 months ago
Empirical performance assessment using soft-core processors on reconfigurable hardware
Simulation has been the de facto standard method for performance evaluation of newly proposed ideas in computer architecture for many years. While simulation allows for theoretica...
Richard Hough, Praveen Krishnamurthy, Roger D. Cha...
DEBS
2010
ACM
13 years 10 months ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
SC
2004
ACM
13 years 11 months ago
Performance Evaluation of Task Pools Based on Hardware Synchronization
A task-based execution provides a universal approach to dynamic load balancing for irregular applications. Tasks are arbitrary units of work that are created dynamically at runtim...
Ralf Hoffmann, Matthias Korch, Thomas Rauber
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
13 years 11 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
MICRO
2007
IEEE
159views Hardware» more  MICRO 2007»
14 years 16 days ago
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...
Kypros Constantinides, Onur Mutlu, Todd M. Austin,...