Sciweavers

515 search results - page 48 / 103
» A Hardware Software Framework for Real-Time Spiking Systems
Sort
View
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
15 years 4 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
RTCSA
2006
IEEE
15 years 3 months ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
CASES
2000
ACM
15 years 2 months ago
A code generation framework for Java component-based designs
In this paper, we describe a software architecture supporting code generation from within Ptolemy II. Ptolemy II is a componentbased design tool intended for embedded and real-tim...
Jeff Tsay, Christopher Hylands, Edward Lee
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
15 years 3 months ago
Library Functions Timing Characterization for Source-Level Analysis
Execution time estimation of software at source-level is nowadays a crucial phase of the system design flow, especially for portable devices and real-time systems. From a source-...
Carlo Brandolese, William Fornaciari, Fabio Salice...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
15 years 3 months ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...