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» A Hierarchy Based on Output Multiplicity
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DSD
2008
IEEE
115views Hardware» more  DSD 2008»
15 years 4 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
ICC
2009
IEEE
135views Communications» more  ICC 2009»
15 years 4 months ago
Linear Precoding for Multiuser MIMO Systems with Multiple Base Stations
Abstract—Linear precoding for multiuser multiple input multiple output (MIMO) cellular systems has generally focused on a single isolated cell. A crucial tool in algorithm develo...
Imad H. Azzam, Raviraj Adve
ASYNC
2005
IEEE
142views Hardware» more  ASYNC 2005»
15 years 3 months ago
An Asynchronous Router for Multiple Service Levels Networks on Chip
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...
Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Ey...
IJCNN
2007
IEEE
15 years 3 months ago
A Closed Form Solution for Multiple-Input Spike Based Adaptive Filters
— Neurons are point process systems, in the sense that the inputs and output which are spike trains can be treated as point processes. System identification of a point process s...
Il Park, António R. C. Paiva, Jose C. Princ...
SSPR
2000
Springer
15 years 1 months ago
Selection of Classifiers Based on Multiple Classifier Behaviour
In the field of pattern recognition, the concept of Multiple Classifier Systems (MCSs) was proposed as a method for the development of high performance classification systems. At p...
Giorgio Giacinto, Fabio Roli, Giorgio Fumera