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» A High Level Power Model for the Nostrum NoC
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DAC
1997
ACM
15 years 3 months ago
High-Level Power Modeling, Estimation, and Optimization
Enrico Macii, Massoud Pedram, Fabio Somenzi
JISE
2007
43views more  JISE 2007»
14 years 11 months ago
A Tableless Approach for High-Level Power Modeling Using Neural Networks
Chih-Yang Hsu, Wen-Tsan Hsieh, Chien-Nan Jimmy Liu...
ICCAD
2003
IEEE
190views Hardware» more  ICCAD 2003»
15 years 8 months ago
IDAP: A Tool for High Level Power Estimation of Custom Array Structures
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
ICCAD
2000
IEEE
159views Hardware» more  ICCAD 2000»
15 years 4 months ago
ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
Erik Lauwers, Georges G. E. Gielen
ICCSA
2007
Springer
15 years 3 months ago
A Novel Congestion Control Scheme for Elastic Flows in Network-on-Chip Based on Sum-Rate Optimization
Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated busses in order to achieve modularity and high performance in the future System-on-Chi...
Mohammad Sadegh Talebi, Fahimeh Jafari, Ahmad Khon...