Sciweavers

3037 search results - page 36 / 608
» A High Performance Application Representation for Reconfigur...
Sort
View
APCSAC
2006
IEEE
15 years 5 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...
RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
15 years 6 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
COMPSYSTECH
2009
14 years 9 months ago
Polymorphic architectures: from media processing to supercomputing
: This paper reveals the evolution of the polymorphic architectures in the context of ever increasing computational demands of the user applications and the need for formal archite...
Georgi Kuzmanov
MSS
1999
IEEE
150views Hardware» more  MSS 1999»
15 years 4 months ago
Performance Benchmark Results for Automated Tape Library High Retrieval Rate Applications - Digital Check Image Retrievals
Benchmark tests have been designed and conducted for the purpose of evaluating the use of automated tape libraries in on-line digital check image retrieval applications. This type...
John Gniewek, George Davidson, Bowen Caldwell
FCCM
2007
IEEE
101views VLSI» more  FCCM 2007»
15 years 6 months ago
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
Han Wei, Mark Muir, Ioannis Nousias, Tughrul Arsla...