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15 years 1 months ago
High Performance Reasoning with Very Large Knowledge Bases
In this contribution we present an empirical analysis of the performance of the ALCNHR+ description logic system RACE applied to TBoxes with a very large number of primitive conce...
Volker Haarslev, Ralf Möller
ISCAS
2006
IEEE
154views Hardware» more  ISCAS 2006»
15 years 5 months ago
FleXilicon: a reconfigurable architecture for multimedia and wireless communications
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
Jong-Suk Lee, Dong Sam Ha
HPDC
2006
IEEE
15 years 5 months ago
Motor: A Virtual Machine for High Performance Computing
High performance application development remains challenging, particularly for scientists making the transition to a Grid environment. In general areas of computing, virtual envir...
Wojtek Goscinski, David Abramson
JEC
2006
100views more  JEC 2006»
14 years 11 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
ERSA
2010
153views Hardware» more  ERSA 2010»
14 years 9 months ago
VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems
- Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requiremen...
Ann Gordon-Ross, Abelardo Jara-Berrocal