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DANCE
2002
IEEE
15 years 4 months ago
Design and Evaluation of a High Performance Dynamically Extensible Router
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...
Fred Kuhns, John D. DeHart, Anshul Kantawala, Ralp...
LCN
1998
IEEE
15 years 4 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...
DSD
2010
IEEE
153views Hardware» more  DSD 2010»
15 years 1 days ago
Simulation of High-Performance Memory Allocators
—Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory us...
José Luis Risco-Martín, José ...
FPL
2008
Springer
175views Hardware» more  FPL 2008»
15 years 1 months ago
File system access from reconfigurable FPGA hardware processes in BORPH
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
Hayden Kwok-Hay So, Robert W. Brodersen
DOA
2000
169views more  DOA 2000»
15 years 1 months ago
DOORS: Towards High-Performance Fault Tolerant CORBA
An increasing number of applications are being developed using distributed object computing middleware, such as CORBA. Many of these applications require the underlying middleware...
Balachandran Natarajan, Aniruddha S. Gokhale, Shal...