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» A High Performance Kernel-Less Operating System Architecture
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ARCS
2008
Springer
15 years 5 months ago
An Optimized ZGEMM Implementation for the Cell BE
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
Timo Schneider, Torsten Hoefler, Simon Wunderlich,...
122
Voted
SC
2005
ACM
15 years 9 months ago
Transparent, Incremental Checkpointing at Kernel Level: a Foundation for Fault Tolerance for Parallel Computers
We describe the software architecture, technical features, and performance of TICK (Transparent Incremental Checkpointer at Kernel level), a system-level checkpointer implemented ...
Roberto Gioiosa, José Carlos Sancho, Song J...
DAC
2006
ACM
16 years 4 months ago
Systematic temperature sensor allocation and placement for microprocessors
Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effec...
Rajarshi Mukherjee, Seda Ogrenci Memik
243
Voted
ICDE
2006
IEEE
206views Database» more  ICDE 2006»
16 years 4 months ago
Query Co-Processing on Commodity Hardware
The rapid increase in the data volumes for the past few decades has intensified the need for high processing power for database and data mining applications. Researchers have acti...
Anastassia Ailamaki, Naga K. Govindaraju, Dinesh M...
133
Voted
ANCS
2006
ACM
15 years 7 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo