Sciweavers

3104 search results - page 384 / 621
» A High Performance Kernel-Less Operating System Architecture
Sort
View
SIGMETRICS
1996
ACM
174views Hardware» more  SIGMETRICS 1996»
15 years 7 months ago
Embra: Fast and Flexible Machine Simulation
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
Emmett Witchel, Mendel Rosenblum
PODC
2003
ACM
15 years 8 months ago
Split-ordered lists: lock-free extensible hash tables
We present the first lock-free implementation of an extensible hash table running on current architectures. Our algorithm provides concurrent insert, delete, and find operations ...
Ori Shalev, Nir Shavit
141
Voted
APSEC
2002
IEEE
15 years 8 months ago
Evaluating the Scalability of Enterprise JavaBeans Technology
One of the major problems in building large-scale distributed systems is to anticipate the performance of the eventual solution before it has been built. This problem is especiall...
Yan (Jenny) Liu, Ian Gorton, Anna Liu, Shiping Che...
MOBIDE
1999
ACM
15 years 7 months ago
DataSpace - Querying and Monitoring Deeply Networked Collections in Physical Space
In this article we introduce a new conception of three-dimensional DataSpace, which is physical space enhanced by connectivity to the network. DataSpace is addressed geographicall...
Tomasz Imielinski, Samir Goel
IPPS
1999
IEEE
15 years 7 months ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini