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» A High Performance Kernel-Less Operating System Architecture
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DAC
2006
ACM
16 years 3 months ago
Rapid and low-cost context-switch through embedded processor customization for real-time and control applications
In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with realtime guarantees. Context-switch, which involves saving...
Xiangrong Zhou, Peter Petrov
HPCA
2009
IEEE
16 years 3 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
ICDE
2006
IEEE
156views Database» more  ICDE 2006»
16 years 4 months ago
Reasoning About Approximate Match Query Results
Join techniques deploying approximate match predicates are fundamental data cleaning operations. A variety of predicates have been utilized to quantify approximate match in such o...
Sudipto Guha, Nick Koudas, Divesh Srivastava, Xiao...
HPCA
2009
IEEE
16 years 3 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
14 years 9 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman