3104 search results - page 543 / 621 » A High Performance Kernel-Less Operating System Architecture |
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
OOPSLA
2009
Springer
15 years 4 months ago
2009
Springer
The shift from single to multiple core architectures means that programmers must write concurrent, multithreaded programs in order to increase application performance. Unfortunate...
DRMTICS
2005
Springer
15 years 3 months ago
2005
Springer
The current deployment of Digital Right Management (DRM) schemes to distribute protected contents and rights is leading the way to massive use of sophisticated embedded cryptograph...
EUC
2005
Springer
15 years 3 months ago
2005
Springer
We propose an efficient scheme called CoReS (Configuration and Registration Scheme) that integrates address assignment and service location for ad hoc networks prevalent in pervasi...
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...