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» A High Performance Kernel-Less Operating System Architecture
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HPCA
2008
IEEE
15 years 10 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
IEEEPACT
2008
IEEE
15 years 4 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
WSE
2006
IEEE
15 years 3 months ago
Modeling Request Routing in Web Applications
For web applications, determining how requests from a web page are routed through server components can be time-consuming and error-prone due to the complex set of rules and mecha...
Minmin Han, Christine Hofmeister
ISPAN
2005
IEEE
15 years 3 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
EGH
2004
Springer
15 years 3 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo