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» A High Performance Kernel-Less Operating System Architecture
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DATE
2000
IEEE
139views Hardware» more  DATE 2000»
15 years 9 months ago
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
ISCAPDCS
2003
15 years 6 months ago
Performance Monitoring of N-tier Client/Server Systems
Despite the widespread deployment of client/server technology, there seem to be no tools currently available that are adequate for analyzing and tuning the performance of client/s...
Christoph Steigner, Jürgen Wilke
INFOCOM
2008
IEEE
15 years 11 months ago
Peacock Hashing: Deterministic and Updatable Hashing for High Performance Networking
—Hash tables are extensively used in networking to implement data-structures that associate a set of keys to a set of values, as they provide O(1), query, insert and delete opera...
Sailesh Kumar, Jonathan S. Turner, Patrick Crowley
CLUSTER
2006
IEEE
15 years 11 months ago
Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
Lei Chai, Albert Hartono, Dhabaleswar K. Panda
136
Voted
MICRO
2006
IEEE
135views Hardware» more  MICRO 2006»
15 years 11 months ago
Support for High-Frequency Streaming in CMPs
As the industry moves toward larger-scale chip multiprocessors, the need to parallelize applications grows. High inter-thread communication delays, exacerbated by over-stressed hi...
Ram Rangan, Neil Vachharajani, Adam Stoler, Guilhe...