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» A Higher-Level Language for Hardware Synthesis
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CODES
2002
IEEE
15 years 2 months ago
A language for multiple models of computation
We introduce a new kernel language for modeling hardware/software systems, adopting multiple heterogenous models of computation. The language has formal operational semantics, and...
Dag Björklund, Johan Lilius
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 1 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...
ARC
2008
Springer
99views Hardware» more  ARC 2008»
14 years 11 months ago
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Hagen Gädke, Andreas Koch
ACSD
2001
IEEE
134views Hardware» more  ACSD 2001»
15 years 1 months ago
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
We present a new way to define the semantics of imperative synchronous languages by means of separating the control and the data flow. The control flow is defined by predicates th...
Klaus Schneider
79
Voted
ICCAD
1994
IEEE
99views Hardware» more  ICCAD 1994»
15 years 1 months ago
Condition graphs for high-quality behavioral synthesis
Identifying mutual exclusiveness between operators during behavioral synthesis is important in order to reduce the required number of control steps or hardware resources. To impro...
Hsiao-Ping Juan, Viraphol Chaiyakul, Daniel D. Gaj...