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» A Higher-Level Language for Hardware Synthesis
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ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
15 years 6 months ago
New decompilation techniques for binary-level co-processor generation
—Existing ASIPs (application-specific instruction-set processors) and compiler-based co-processor synthesis approaches meet the increasing performance requirements of embedded ap...
Greg Stiff, Frank Vahid
82
Voted
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
15 years 4 months ago
Synthesizing Synchronous Elastic Flow Networks
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
Greg Hoover, Forrest Brewer
MSO
2003
14 years 11 months ago
Simulation based Development of Efficient Hardware for Sort based Algorithms
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
Niklas Hansson, Jay H. Harris

Lab
737views
16 years 9 months ago
Resource Aware Programming (RAP)
We are interested in studying and developing programming languages techniques such as multi-stage programming, reactive programming, and indexed types and in showing how they can b...
ROBOCUP
2009
Springer
110views Robotics» more  ROBOCUP 2009»
15 years 4 months ago
A Lua-based Behavior Engine for Controlling the Humanoid Robot Nao
The high-level decision making process of an autonomous robot can be seen as an hierarchically organised entity, where strategical decisions are made on the topmost layer, while th...
Tim Niemüller, Alexander Ferrein, Gerhard Lak...