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» A Higher-Level Language for Hardware Synthesis
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CODES
2005
IEEE
15 years 3 months ago
The design of a smart imaging core for automotive and consumer applications: a case study
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two spe...
Wido Kruijtzer, Winfried Gehrke, Víctor Rey...
VLSID
2002
IEEE
132views VLSI» more  VLSID 2002»
15 years 10 months ago
VLSI Architecture for a Flexible Motion Estimation with Parameters
If motion estimation can choose the most suitable algorithm according to the changing characteristics of input image signals, we can get benefits, which improve quality and perfor...
Jinku Choi, Nozomu Togawa, Masao Yanagisawa, Tatsu...
ICCD
2003
IEEE
127views Hardware» more  ICCD 2003»
15 years 6 months ago
Structural Detection of Symmetries in Boolean Functions
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using spe...
Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangi...
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
15 years 2 months ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
DATE
2000
IEEE
94views Hardware» more  DATE 2000»
15 years 2 months ago
Shared Memory Implementations of Synchronous Dataflow Specifications
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
Praveen K. Murthy, Shuvra S. Bhattacharyya