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» A Logic for True Concurrency
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CJ
2006
84views more  CJ 2006»
14 years 9 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CLUSTER
2004
IEEE
14 years 9 months ago
Seamless Access to Decentralized Storage Services in Computational Grids via a Virtual File System
This paper describes a novel technique for establishing a virtual file system that allows data to be transferred user-transparently and on-demand across computing and storage serve...
Renato J. O. Figueiredo, Nirav H. Kapadia, Jos&eac...
INFORMS
1998
150views more  INFORMS 1998»
14 years 9 months ago
Branch and Infer: A Unifying Framework for Integer and Finite Domain Constraint Programming
constraint abstractions into integer programming, and to discuss possible combinations of the two approaches. Combinatorial problems are ubiquitous in many real world applications ...
Alexander Bockmayr, Thomas Kasper
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
14 years 7 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
CORR
2011
Springer
179views Education» more  CORR 2011»
14 years 4 months ago
An overview of Ciao and its design philosophy
We provide an overall description of the Ciao multiparadigm programming system emphasizing some of the novel aspects and motivations behind its design and implementation. An impor...
Manuel V. Hermenegildo, Francisco Bueno, Manuel Ca...