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» A Logic for True Concurrency
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ISMVL
2005
IEEE
108views Hardware» more  ISMVL 2005»
15 years 5 months ago
Approaching the Physical Limits of Computing
As logic device sizes shrink towards the nanometer scale, a number of important physical limits threaten to soon halt further improvements in computer performance per unit cost. H...
Michael P. Frank
UML
2004
Springer
15 years 5 months ago
SoftContract: Model-Based Design of Error-Checking Code and Property Monitors
This paper discusses a model-based design flow for requirements in distributed embedded software development. Such requirements are specified using a language similar to Linear T...
Luciano Lavagno, Marco Di Natale, Alberto Ferrari,...
CHES
2000
Springer
75views Cryptology» more  CHES 2000»
15 years 4 months ago
A 155 Mbps Triple-DES Network Encryptor
The presented Triple-DES encryptor is a single-chip solution to encrypt network communication. It is optimized for throughput and fast switching between virtual connections like fo...
Herbert Leitold, Wolfgang Mayerwieser, Udo Payer, ...
ARTS
1999
Springer
15 years 4 months ago
ProbVerus: Probabilistic Symbolic Model Checking
Model checking can tell us whether a system is correct; probabilistic model checking can also tell us whether a system is timely and reliable. Moreover, probabilistic model checkin...
Vicky Hartonas-Garmhausen, Sérgio Vale Agui...
LPNMR
1993
Springer
15 years 4 months ago
Negation as Partial Failure
We present a logic programming language which uses a four-valued bilattice as the underlying framework for semantics of programs. The two orderings of the bilattice reflect the c...
Bamshad Mobasher, Jacek Leszczylowski, Don Pigozzi