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» A Logic for Virtual Memory
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MTDT
2002
IEEE
108views Hardware» more  MTDT 2002»
15 years 2 months ago
A Fault Modeling Technique to Test Memory BIST Algorithms
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil ...
IPPS
2003
IEEE
15 years 2 months ago
Reconfigurable Architecture Requirements for Co-Designed Virtual Machines
This paper addresses the physical hardware requirements necessary for a co-design hardware/software virtual machine to not only exist, but to also provide comparable performance w...
Kenneth B. Kent, Micaela Serra
73
Voted
DATE
2005
IEEE
235views Hardware» more  DATE 2005»
15 years 3 months ago
Challenges in Embedded Memory Design and Test
Both the number of embedded memories, as well as the total embedded memory content in our chips is growing steadily. Time for chip designers, EDA makers, and test engineers to upd...
Erik Jan Marinissen, Betty Prince, Doris Keitel-Sc...
72
Voted
TVLSI
2008
106views more  TVLSI 2008»
14 years 9 months ago
New Non-Volatile Memory Structures for FPGA Architectures
A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is describ...
David Choi, Kyu Choi, John D. Villasenor
FUZZIEEE
2007
IEEE
15 years 3 months ago
A Fuzzy Action Selection Method for Virtual Agent Navigation in Unknown Virtual Environments
This paper presents an action selection method using fuzzy logic. The objective is to solve behaviour conflict in behaviour-based architectures for virtual agent navigation in un...
Jafreezal Jaafar, Eric McKenzie, Alan Smaill