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» A Logic for Virtual Memory
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SIGPLAN
2002
14 years 9 months ago
Write barrier removal by static analysis
We present a new analysis for removing unnecessary write barriers in programs that use generational garbage collection. To our knowledge, this is the first static program analysis...
Karen Zee, Martin C. Rinard
TPDS
2002
198views more  TPDS 2002»
14 years 9 months ago
Orthogonal Striping and Mirroring in Distributed RAID for I/O-Centric Cluster Computing
This paper presents a new distributed disk-array architecture for achieving high I/O performance in scalable cluster computing. In a serverless cluster of computers, all distribute...
Kai Hwang, Hai Jin, Roy S. C. Ho
ICPADS
2010
IEEE
14 years 7 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
IJPP
2011
105views more  IJPP 2011»
14 years 4 months ago
Correlating Radio Astronomy Signals with Many-Core Hardware
A recent development in radio astronomy is to replace traditional dishes with many small antennas. The signals are combined to form one large, virtual telescope. The enormous data ...
Rob van Nieuwpoort, John W. Romein
ISCA
2008
IEEE
114views Hardware» more  ISCA 2008»
15 years 3 months ago
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
Jae W. Lee, Man Cheuk Ng, Krste Asanovic