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» A Logic for Virtual Memory
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DMSN
2009
ACM
15 years 4 months ago
Message models and aggregation in knowledge based middleware for rich sensor systems
Networked, distributed real world sensing is an increasingly prominent topic in computing and has quickly expanded from resource constrained “sensor networks” measuring simple...
Joseph B. Kopena, William C. Regli, Boon Thau Loo
EMSOFT
2007
Springer
15 years 3 months ago
Proving the absence of run-time errors in safety-critical avionics code
We explain the design of the interpretation-based static analyzer Astr´ee and its use to prove the absence of run-time errors in safety-critical codes. Categories and Subject Des...
Patrick Cousot
IPPS
2006
IEEE
15 years 3 months ago
An extensible global address space framework with decoupled task and data abstractions
ions Sriram Krishnamoorthy½ Umit Catalyurek¾ Jarek Nieplocha¿ Atanas Rountev½ P. Sadayappan½ ½ Dept. of Computer Science and Engineering, ¾ Dept. of Biomedical Informatics T...
Sriram Krishnamoorthy, Ümit V. Çataly&...
IPPS
2006
IEEE
15 years 3 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
15 years 3 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...