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» A Logic for Virtual Memory
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TC
2010
14 years 6 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
ISLPED
1998
ACM
83views Hardware» more  ISLPED 1998»
15 years 4 months ago
A three-port adiabatic register file suitable for embedded applications
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs...
Stephan Avery, Marwan A. Jabri
VR
2002
IEEE
15 years 4 months ago
Interacting with Visible Human Data Using an ImmersaDesk
Interaction with medical volume data has often been difficult due to the large memory and computational power required. By taking advantage of current high-end graphics hardware, ...
Ching-Yao Lin, David T. Chen, R. Bowen Loftin, Jia...
HCI
2007
15 years 1 months ago
Modeling Human Bipedal Navigation in a Dynamic Three Dimensional Virtual Environment
The current research sought to construct a computational model of human navigation for virtual three dimensional environments. The model was implemented within the ACT-R cognitive ...
Mark D. Thomas, Daniel W. Carruth, Bryan Robbins, ...
USENIX
2008
15 years 2 months ago
LeakSurvivor: Towards Safely Tolerating Memory Leaks for Garbage-Collected Languages
Continuous memory leaks severely hurt program performance and software availability for garbage-collected programs. This paper presents a safe method, called LeakSurvivor, to tole...
Yan Tang, Qi Gao, Feng Qin