1410 search results - page 39 / 282 » A Logic for Virtual Memory |
HIPEAC
2007
Springer
15 years 6 months ago
2007
Springer
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
103
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ASPLOS
2006
ACM
15 years 5 months ago
2006
ACM
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...
113
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CGO
2006
IEEE
15 years 3 months ago
2006
IEEE
Memory performance is an important design issue for contemporary systems given the ever increasing memory gap. This paper proposes a space-efficient Java object model for reducing...
129
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SIGSOFT
2006
ACM
15 years 5 months ago
2006
ACM
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
103
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TC
2008
14 years 11 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...