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» A Logic for Virtual Memory
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DATE
2010
IEEE
110views Hardware» more  DATE 2010»
15 years 5 months ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...
ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
15 years 8 months ago
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
RIDE
1999
IEEE
15 years 4 months ago
Specification of Cooperative Constraints in Virtual Enterprise Workflow
Workflow systems are an emerging technology which have become increasingly important in the drive for business to provide better services and increase productivity. Intuitively, w...
Anne H. H. Ngu
IADIS
2004
15 years 1 months ago
A Model for Naturalistic Virtual User Simulation
The aim of this study is to present a contribution in the area of human decision modeling. A state of the art from this research area shows the lack of models combining perceptive...
Laurent Bodic, Pierre Favier, Guillaume Calvet
EUSFLAT
2009
136views Fuzzy Logic» more  EUSFLAT 2009»
14 years 9 months ago
Fuzzy Continuous Evaluation in Training Systems Based on Virtual Reality
The approach of continuous evaluation is an important tool in the learning process. However, only recently it was applied in training based on virtual reality. This paper presents ...
Ronei Moraes, Liliane Machado