1410 search results - page 73 / 282 » A Logic for Virtual Memory |
EUROMICRO
2000
IEEE
15 years 4 months ago
2000
IEEE
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
116
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ISSS
1996
IEEE
15 years 4 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
DSD
2007
IEEE
15 years 6 months ago
2007
IEEE
An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the supe...
DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
102
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DATE
2006
IEEE
15 years 6 months ago
2006
IEEE
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...