2911 search results - page 143 / 583 » A Logic of Graph Constraints |
CONSTRAINTS
2007
15 years 21 days ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
99
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ISMVL
2003
IEEE
15 years 6 months ago
2003
IEEE
This paper introduces the implementation of the Iterative Symmetry Indices Decomposition (ISID) for the synthesis of ternary threedimensional logic circuits. The synthesis of regu...
135
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CORR
2011
Springer
14 years 4 months ago
2011
Springer
The probability theory is a well-studied branch of mathematics, in order to carry out formal reasoning about probability. Thus, it is important to have a logic, both for computati...
95
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CORR
2008
Springer
15 years 24 days ago
2008
Springer
In this paper, we study phase transition behavior emerging from the interactions among multiple agents in the presence of noise. We propose a simple discrete-time model in which a...
ICALP
1995
Springer
15 years 4 months ago
1995
Springer
We describe the rst parallel algorithm with optimal speedup for constructing minimum-width tree decompositions of graphs of bounded treewidth. On n-vertex input graphs, the algori...