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» A Logic of Graph Constraints
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99
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ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
15 years 5 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat
126
Voted
FM
2009
Springer
163views Formal Methods» more  FM 2009»
15 years 5 months ago
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks
We study a clock synchronization protocol for the Chess WSN. First, we model the protocol as a network of timed automata and verify various instances using the Uppaal model checker...
Faranak Heidarian, Julien Schmaltz, Frits W. Vaand...
108
Voted
GI
2009
Springer
15 years 5 months ago
Applying Semantic Technologies for Context-Aware AAL Services: What we can learn from SOPRANO
Abstract: Ambient assisted living (AAL) is a newly emerging term describing a research area with focus on services that support people in their daily life with particular focus on ...
Peter Wolf, Andreas Schmidt, Michael Klein
110
Voted
AGENTS
2001
Springer
15 years 5 months ago
Automated negotiation from declarative contract descriptions
We present and implement an infrastructure for automating the negotiation of business contracts. Underlying our system is a declarative language for both (1) fully-specified, exe...
Daniel M. Reeves, Michael P. Wellman, Benjamin N. ...
98
Voted
FPGA
2001
ACM
139views FPGA» more  FPGA 2001»
15 years 5 months ago
A memory coherence technique for online transient error recovery of FPGA configurations
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
Wei-Je Huang, Edward J. McCluskey