We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...
We propose a biologically and physically plausible model for ants and pheromones, and show this model to be sufficiently powerful to simulate the computation of arbitrary logic cir...
Abstract. This paper introduces a compositional Hoare logics for reasoning about the correctness of systems composed of a dynamically evolving collection of processes (also called ...
In this paper we propose a data model for representing moving objects in database systems. It is called the Moving Objects Spatio-Temporal (MOST) data model. We also propose Futur...
A. Prasad Sistla, Ouri Wolfson, Sam Chamberlain, S...
Abstract. We present an integration of answer set programming and constraint processing as an interesting approach to constraint logic programming. Although our research is in a ve...