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FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
15 years 8 months ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
AGI
2008
15 years 5 months ago
How Might Probabilistic Reasoning Emerge from the Brain?
: A series of hypotheses is proposed, connecting neural structures and dynamics with the formal structures and processes of probabilistic logic. First, a hypothetical connection is...
Ben Goertzel, Cassio Pennachin
JOLLI
2002
120views more  JOLLI 2002»
15 years 4 months ago
The Donkey and the Monoid. Dynamic Semantics with Control Elements
Dynamic Predicate Logic (DPL) is a variant of Predicate Logic introduced by Groenendijk en Stokhof. One rationale behind the indroduction of DPL is that it is closer to Natural La...
Albert Visser
CORR
2010
Springer
158views Education» more  CORR 2010»
14 years 11 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
CCS
2006
ACM
15 years 8 months ago
A scalable approach to attack graph generation
Attack graphs are important tools for analyzing security vulnerabilities in enterprise networks. Previous work on attack graphs has not provided an account of the scalability of t...
Xinming Ou, Wayne F. Boyer, Miles A. McQueen