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» A Logical Process Calculus
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ICML
2004
IEEE
16 years 4 months ago
Bellman goes relational
Motivated by the interest in relational reinforcement learning, we introduce a novel relational Bellman update operator called ReBel. It employs a constraint logic programming lan...
Kristian Kersting, Martijn Van Otterlo, Luc De Rae...
VLSID
2002
IEEE
94views VLSI» more  VLSID 2002»
16 years 4 months ago
Timing Yield Calculation Using an Impulse-Train Approach
This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that ma...
Srinath R. Naidu
149
Voted
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 20 days ago
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
Mihir R. Choudhury, Quming Zhou, Kartik Mohanram
139
Voted
DEXAW
2009
IEEE
171views Database» more  DEXAW 2009»
15 years 10 months ago
Ontology Knowledge Authoring by Natural Language Empowerment
One of the main limitations in using ontologies in modern information systems is due to the fact that the design and maintenance of ontologies is a complex activity that requires ...
Alfio Ferrara, Stefano Montanelli, Gaia Varese, Si...
114
Voted
FM
2009
Springer
124views Formal Methods» more  FM 2009»
15 years 10 months ago
Reasoning about Memory Layouts
Verification methods for memory-manipulating C programs need to address not only well-typed programs that respect invariants such as the split heap memory model, but also programs...
Holger Gast