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» A Logical Process Calculus
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136
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ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
16 years 20 days ago
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 20 days ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
152
Voted
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
15 years 10 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
ICASSP
2008
IEEE
15 years 10 months ago
Accurate models for estimating area and power of FPGA implementations
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabar...
DASFAA
2007
IEEE
266views Database» more  DASFAA 2007»
15 years 10 months ago
Compatibility Analysis and Mediation-Aided Composition for BPEL Services
In Service Oriented Architecture (SOA), the need for inter-service compatibility analysis has gone beyond what existing service composition/ verification approaches can handle. Giv...
Wei Tan, Fangyan Rao, Yushun Fan, Jun Zhu