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ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
15 years 9 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
SOSP
2005
ACM
15 years 9 months ago
Implementing declarative overlays
Overlay networks are used today in a variety of distributed systems ranging from file-sharing and storage systems to communication infrastructures. However, designing, building a...
Boon Thau Loo, Tyson Condie, Joseph M. Hellerstein...
107
Voted
ISPASS
2009
IEEE
15 years 7 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
134
Voted
DSN
2009
IEEE
15 years 7 months ago
Low overhead Soft Error Mitigation techniques for high-performance and aggressive systems
The threat of soft error induced system failure in high performance computing systems has become more prominent, as we adopt ultra-deep submicron process technologies. In this pap...
Naga Durga Prasad Avirneni, Viswanathan Subramania...
ICSEA
2009
IEEE
15 years 7 months ago
Ontology Driven E-Government
: This paper presents an approach to model ontologies for the e-Government domain as a basis for an integrated e-Government environment. Over the last couple of years the applicati...
Peter Salhofer, Bernd Stadlhofer, Gerald Tretter