154 search results - page 12 / 31 » A Low Power Highly Associative Cache for Embedded Systems |
CASES
2003
ACM
15 years 2 months ago
2003
ACM
This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-m...
ISCA
2005
IEEE
15 years 3 months ago
2005
IEEE
Recent years have seen a burgeoning interest in embedded wireless sensor networks with applications ranging from habitat monitoring to medical applications. Wireless sensor networ...
80
Voted
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
79
Voted
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...