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» A Low Power TLB Structure for Embedded Systems
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ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
15 years 2 months ago
Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for applicationspecific systems, called VAbM technique. It targets th...
Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma,...
DAC
2007
ACM
15 years 10 months ago
Dynamic Power Management with Hybrid Power Sources
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, N...
EMSOFT
2010
Springer
14 years 7 months ago
Nucleos: a runtime system for ultra-compact wireless sensor nodes
Nucleos is a new runtime system for ultra-lightweight embedded systems. Central to Nucleos is a dispatcher based on the concept of e threaded code, which enables layers of abstrac...
Jiwon Hahn, Pai H. Chou
MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
15 years 2 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
HPCC
2007
Springer
15 years 3 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to ef...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai