Sciweavers

350 search results - page 20 / 70
» A Low Power TLB Structure for Embedded Systems
Sort
View
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 1 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
EUC
2005
Springer
15 years 3 months ago
On Tools for Modeling High-Performance Embedded Systems
Abstract. Most of the new embedded systems require high performance processors at low power. To cater to these needs, most semiconductor companies are designing multi-core processo...
Anilkumar Nambiar, Vipin Chaudhary
FORMATS
2009
Springer
15 years 4 months ago
Exploiting Timed Automata for Conformance Testing of Power Measurements
For software development, testing is still the primary choice for investigating the correctness of a system. Automated testing is of utmost importance to support continuous integra...
Matthias Woehrle, Kai Lampka, Lothar Thiele
IPPS
2010
IEEE
14 years 7 months ago
A low cost split-issue technique to improve performance of SMT clustered VLIW processors
Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreadi...
Manoj Gupta, Fermín Sánchez, Josep L...
JTRES
2010
ACM
14 years 10 months ago
Cyclic executive for safety-critical Java on chip-multiprocessors
Chip-multiprocessors offer increased processing power at a low cost. However, in order to use them for real-time systems, tasks have to be scheduled efficiently and predictably. I...
Anders P. Ravn, Martin Schoeberl