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» A Low Power TLB Structure for Embedded Systems
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ASYNC
2000
IEEE
86views Hardware» more  ASYNC 2000»
15 years 2 months ago
An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems
Self-timed systems often have to communicate with their environment through a clocked interface. For example, off-chip memory may require clocking and this can reduce the benefit...
George S. Taylor, Simon W. Moore, Steve Wilcox, Pe...
LCTRTS
2000
Springer
15 years 1 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra
CBSE
2004
Springer
15 years 3 months ago
Introducing a Component Technology for Safety Critical Embedded Real-Time Systems
Safety critical embedded real-time systems represent a class of systems that has attracted relatively little attention in research addressing component based software engineering. ...
Kristian Sandström, Johan Fredriksson, Mikael...
EUC
2006
Springer
15 years 1 months ago
Saving Register-File Leakage Power by Monitoring Instruction Sequence in ROB
- Modern portable or embedded systems support more and more complex applications. These applications make embedded devices require not only low powerconsumption, but also high comp...
Wann-Yun Shieh, Hsin-Dar Chen
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
15 years 4 months ago
Single ended 6T SRAM with isolated read-port for low-power embedded systems
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Sara...