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» A Low Power TLB Structure for Embedded Systems
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ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
15 years 3 months ago
Energy-aware memory allocation in heterogeneous non-volatile memory systems
Memory systems consume a significant portion of power in handheld embedded systems. So far, low-power memory techniques have addressed the power consumption when the system is tu...
Hyung Gyu Lee, Naehyuck Chang
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
15 years 2 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
IEEEINTERACT
2003
IEEE
15 years 3 months ago
High Performance Code Generation through Lazy Activation Records
For call intensive programs, function calls are major bottlenecks during program execution since they usually force register contents to be spilled into memory. Such register to m...
Manoranjan Satpathy, Rabi N. Mahapatra, Siddharth ...
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
15 years 2 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...
ISQED
2010
IEEE
176views Hardware» more  ISQED 2010»
14 years 8 months ago
A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead
Low power, minimum transistor count and fast access static random access memory (SRAM) is essential for embedded multimedia and communication applications realized using system on...
Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dh...