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» A Mathematical Programming Model For A Timetabling Problem
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ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 1 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
FPL
2006
Springer
66views Hardware» more  FPL 2006»
15 years 1 months ago
Minimizing Communication Cost for Reconfigurable Slot Modules
We discuss the problem of communication-aware module placement in array-like reconfigurable environments, such as the Erlangen Slot Machine (ESM). Bad placement of modules may deg...
Sándor P. Fekete, Jan van der Veen, Mateusz...
FPL
2009
Springer
103views Hardware» more  FPL 2009»
14 years 7 months ago
Customizable domain-specific computing
In this article, we introduce the ongoing research in modeling and mapping for heterogeneous, customizable, parallel systems, as part of the effort in the newly established Center...
Jason Cong
CEC
2010
IEEE
14 years 1 months ago
A hybrid genetic algorithm for rescue path planning in uncertain adversarial environment
— Efficient vehicle path planning in hostile environment to carry out rescue or tactical logistic missions remains very challenging. Most approaches reported so far relies on key...
Jean Berger, Khaled Jabeur, Abdeslem Boukhtouta, A...
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
15 years 4 months ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram