743 search results - page 12 / 149 » A Mechanism for Communicating in Dynamically Reconfigurable ... |
CASES
2008
ACM
14 years 11 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
77
Voted
FPL
2006
Springer
15 years 1 months ago
2006
Springer
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
96
Voted
FSEN
2007
Springer
15 years 1 months ago
2007
Springer
Abstract. Future communication and computation devices require mechanisms for on-the-fly reconfiguration in their protocol stack to operate in different situations and networks. Th...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Modern FPGAs, such as the Xilinx Virtex-II Series, offer the feature of partial and dynamic reconfiguration, allowing to load various hardware configurations (i.e., HW modules) du...
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...