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CODES
2002
IEEE
15 years 4 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
ICASSP
2008
IEEE
15 years 6 months ago
Implementing communications systems on an SDR SoC
Software Defined Radios (SDRs) offer a programmable and dynamically reconfigurable method of reusing hardware to implement the physical layer processing of multiple communications...
John Glossner, Daniel Iancu, Mayan Moudgill, Sanja...
SIES
2010
IEEE
14 years 9 months ago
Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks
In this paper we present an approach to increase the fault tolerance in FlexRay networks by introducing backup nodes to replace defect ECUs (Electronic Control Units). In order to ...
Kay Klobedanz, Gilles B. Defo, Wolfgang Mülle...
ERSA
2006
91views Hardware» more  ERSA 2006»
15 years 1 months ago
Intrinsic Embedded Hardware Evolution of Block-based Neural Networks
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
Saumil Merchant, Gregory D. Peterson, Seong Kong
JEC
2006
100views more  JEC 2006»
14 years 11 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...