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118
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DAC
2003
ACM
16 years 1 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
DAC
2003
ACM
16 years 1 months ago
A retargetable micro-architecture simulator
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...
Wai Sum Mong, Jianwen Zhu
GECCO
2009
Springer
166views Optimization» more  GECCO 2009»
15 years 7 months ago
Genetic programming in the wild: evolving unrestricted bytecode
We describe a methodology for evolving Java bytecode, enabling the evolution of extant, unrestricted Java programs, or programs in other languages that compile to Java bytecode. B...
Michael Orlov, Moshe Sipper
FPL
2005
Springer
111views Hardware» more  FPL 2005»
15 years 6 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
77
Voted
GECCO
2005
Springer
138views Optimization» more  GECCO 2005»
15 years 6 months ago
Hierarchical multi-sensor image registration using evolutionary computation
Image registration between multi-sensor imagery is a challenging problem due to the difficulties associated with finding a correspondence between pixels from images taken by the...
Ju Han, Bir Bhanu