Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do n...
Randall S. Janka, Linda M. Wills, Lewis B. Baumsta...
— We propose a methodology for Boolean matching under permutations of inputs and outputs (PP-equivalence checking problem) — a key step in incremental logic design that identif...
We propose an architectural design methodology for designing formally verifiable cache coherence protocols, called Fractal Coherence. Properly designed to be fractal in behavior, t...
Abstract--For modern embedded systems in the realm of highthroughput multimedia, imaging, and signal processing, the complexity of embedded applications has reached a point where t...