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» A Methodology for Large-Scale Hardware Verification
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DAC
2001
ACM
15 years 10 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
GECCO
2008
Springer
257views Optimization» more  GECCO 2008»
14 years 10 months ago
Rapid evaluation and evolution of neural models using graphics card hardware
This paper compares three common evolutionary algorithms and our modified GA, a Distributed Adaptive Genetic Algorithm (DAGA). The optimal approach is sought to adapt, in near rea...
Thomas F. Clayton, Leena N. Patel, Gareth Leng, Al...
DATE
2006
IEEE
141views Hardware» more  DATE 2006»
15 years 3 months ago
Evaluating coverage of error detection logic for soft errors using formal methods
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
Udo Krautz, Matthias Pflanz, Christian Jacobi 0002...
DATE
2002
IEEE
96views Hardware» more  DATE 2002»
15 years 2 months ago
A Linear-Centric Simulation Framework for Parametric Fluctuations
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...
Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Protocol Transducer Synthesis using Divide and Conquer approach
One of the efficient design methodologies for large scale System on a Chip (SoC) is IP-based design. In this methodology, a system is considered as a set of components and intercon...
Shigeru Watanabe, Kenshu Seto, Y. Ishikawa, Satosh...