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» A Methodology for Large-Scale Hardware Verification
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DT
2006
180views more  DT 2006»
14 years 9 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 1 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 2 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
15 years 2 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler
GIS
2008
ACM
15 years 10 months ago
Pedestrian flow prediction in extensive road networks using biased observational data
In this paper, we discuss an application of spatial data mining to predict pedestrian flow in extensive road networks using a large biased sample. Existing out-of-the-box techniqu...
Michael May, Simon Scheider, Roberto Rösler, ...