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» A Methodology for Large-Scale Hardware Verification
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DATE
2004
IEEE
174views Hardware» more  DATE 2004»
15 years 1 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
ITC
2003
IEEE
222views Hardware» more  ITC 2003»
15 years 2 months ago
Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Mahesh A. Iyer
CODES
2006
IEEE
15 years 3 months ago
Methodology for attack on a Java-based PDA
Although mobile Java code is frequently executed on many wireless devices, the susceptibility to electromagnetic (EM) attacks is largely unknown. If analysis of EM waves emanating...
Catherine H. Gebotys, Brian A. White
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
CADE
2007
Springer
15 years 10 months ago
A History-based Verification of Distributed Applications
Safety and security guarantees for individual applications in general depend on assumptions on the given context provided by distributed instances of operating systems, hardware pl...
Bruno Langenstein, Andreas Nonnengart, Georg Rock,...