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» A Methodology for Large-Scale Hardware Verification
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PAMI
2006
186views more  PAMI 2006»
14 years 9 months ago
Performance Evaluation of Fingerprint Verification Systems
This paper is concerned with the performance evaluation of fingerprint verification systems. After an initial classification of biometric testing initiatives, we explore both the t...
Raffaele Cappelli, Dario Maio, Davide Maltoni, Jam...
ICCAD
2009
IEEE
121views Hardware» more  ICCAD 2009»
14 years 7 months ago
MOLES: Malicious off-chip leakage enabled by side-channels
Economic incentives have driven the semiconductor industry to separate design from fabrication in recent years. This trend leads to potential vulnerabilities from untrusted circui...
Lang Lin, Wayne Burleson, Christof Paar
ATS
2001
IEEE
172views Hardware» more  ATS 2001»
15 years 1 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 1 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Power estimation starategies for a low-power security processor
In this paper, we present the power estimation methodologies for the development of a low-power security processor that contains significant amount of logic and memory. For the lo...
Yen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling C...