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» A Methodology for Large-Scale Hardware Verification
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VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
15 years 10 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
ITC
2003
IEEE
135views Hardware» more  ITC 2003»
15 years 2 months ago
MEMS Design And Verification
The long term impact of MEMS technology will be in its ability to integrate novel sensing and actuation functionality on traditional computing and communication devices enabling t...
Tamal Mukherjee
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
14 years 7 months ago
Managing verification error traces with bounded model debugging
Managing long verification error traces is one of the key challenges of automated debugging engines. Today, debuggers rely on the iterative logic array to model sequential behavior...
Sean Safarpour, Andreas G. Veneris, Farid N. Najm
DATE
2003
IEEE
140views Hardware» more  DATE 2003»
15 years 2 months ago
Qualifying Precision of Abstract SystemC Models Using the SystemC Verification Standard
ng precision of abstract SystemC models using the SystemC Verification Standard Franco Carbognani1 , Christopher K. Lennard2 , C. Norris Ip3 , Allan Cochrane2 , Paul Bates2 1 Caden...
Franco Carbognani, Christopher K. Lennard, C. Norr...
BCS
2008
14 years 11 months ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi